PLL-based nanoresonator driving IC with automatic parasitic capacitance cancellation and automatic gain control

This paper presents a phase-locked loop (PLL) based resonator driving integrated circuit (IC) with automatic parasitic capacitance cancellation and gain control. The PLL consisting of phase frequency detector (PFD), filter, voltage-controlled oscillator (VCO) makes the to be locked at resonant frequency. is modeled by Butterworth–Van Dyke equivalent model motional resistance 72.8 kΩ, 6.19 fF, inductance 79.4 mH, parallel 2.59 pF. To mitigate magnitude distortion in response, it necessary compensate for capacitance. proposed operated open-loop mode. In phase, outputs transimpedance amplifier (TIA) lower higher than (VH VL), are compared, programmable compensation capacitor array matches VH VL using binary-searched algorithm cancel control (AGC) keeps oscillation suitable amplitude, AGC output can used as measurement resistance. also digitally controlled. IC designed 0.18-μm bipolar complementary metal oxide semiconductor double-diffused (BCDMOS) process an active area 3.2 mm 2 . simulated noise −61.1 dBc/Hz 1 kHz quality factor ( Q-factor) 59,590.